SKY63104/5/6 Family of Jitter Attenuating Clocks and SKY62101 Ultra-low Jitter Clock Generators Available Now

Skyworks Solutions, Inc., an innovator of high-performance analog and mixed-signal semiconductors connecting people, places and things, today announced its latest timing products, the SKY63104/5/6 family of jitter attenuating clocks and the SKY62101 ultra-low jitter clock generator. Based on Skyworks’ fifth generation DSPLL® and MultiSynth™ technologies, these devices enable any-frequency, any-output clock generation and single-IC clock tree solutions for the most demanding networking, data center and industrial applications.

The SKY63104/5/6 family of jitter attenuating clocks and SKY62101 clock generators are the industry’s first clock devices that can simultaneously generate Ethernet and PCI Express® (PCIe) spread spectrum clocks with unparalleled ultra-low jitter performance. These products provide ultra-low jitter reference clocks for 224G PAM4 Ethernet SerDes with 18fs RMS phase jitter, while generating standards-compliant spread spectrum PCIe clocks (PCIe Gen 1/2/3/4/5/6). Outputs can be independently configured for Ethernet, PCIe and/or general-purpose clocking, making them suitable for a wide range of applications, including:

• Internet infrastructure: Optical and Ethernet networking equipment, including edge/core routers and switches and OTN equipment
• Data centers: Spine and leaf switches, top-of-rack switches, SmartNIC Cards, and AI accelerators
• Industrial: Medical imaging, test and measurement, audio/video broadcast/distribution systems, and satellite communications

“We are excited to introduce the SKY63104/5/6 family of jitter attenuating clocks and the SKY62101 ultra-low jitter clock generator,” said James Wilson, vice president and general manager for Mixed Signal Solutions at Skyworks. “Our advanced DSPLL® and MultiSynth™ technologies set a new benchmark for performance and integration, enabling our customers to greatly simplify clock generation in their most demanding applications.”

The explosive growth in network bandwidth, cloud computing, and AI in data centers is driving the adoption of 112G/224 PAM4 SerDes technology in 800G/1200G/1600G networks, compelling the need for ultra-low jitter reference clocks. Additionally, PCIe links used for chip-to-chip communication in data center applications are getting faster and faster. PCIe Gen 6 supports a data rate of 64GT/s, doubling the necessary bandwidth requirements over the previous Gen 5 and creating demand for lower-jitter PCIe reference clocks.

The SKY63104/5/6 family of jitter attenuating clocks and SKY62101 clock generators feature 12 outputs in a space-saving 8x8mm QFN package with wettable flanks that provide improved board level assembly reliability. These products offer the widest frequency output range from 8kHz to 3.2GHz with highly configurable clock outputs supporting multiple formats, including LVDS, HCSL, LVPECL, LVCMOS, S-LVDS, and CML. They also provide very low output-to-output skew of ±50ps with output delay adjustments as low as 50ps steps. Outputs can be independently configured for PCIe applications, with optional spread-spectrum clock generation for EMI reduction.

Combining Ethernet, PCIe, and general-purpose clock generation in a single device enables hardware designers to implement complex heterogenous clock tree designs with the fewest number of components, simplifying design and accelerating time to market. Simplified device configuration is available using Skyworks’ ClockBuilder Pro software. Additionally, these products offer excellent hitless switching with phase transients as low as 35ps while providing compliance with the ITU-T G.8262 Synchronous Ethernet (SyncE) Options 1 and 2, ITU-T G.812 Type III and IV, ITU-T G.813 Option 1, and Telcordia GR-1244 and GR-253 (Stratum-3/3E) standards.

For more information about the SKY63104/5/6 family and the SKY62101 clock generator, please visit skyworksinc.com/Products/Timing.

Source: BUSINESS WIRE